Floor Plan Questions ...
What are all the inputs needed to Start Floorplan activities? What kind of sanity checks will be done at FloorPlan ? What is the LEF and .libs ? Timing Information (SDC and. libs) are mandatory to start Floorplan? What is the aspect Ratio? Is the aspect Ratio is technology dependent? How to create Block size based on Utilization? Are Block X and Y dependent upon the Aspect Ratio? Is utilization will impact the Block Size? What is the purpose of TAP, END CAP and DECAP cells? What are the different types of checks will do for Netlist? Is really technologies (14 nm/7nm) will impact the floor Plan? What is the difference between Flip Chip Vs Wire bound designs? What do you mean by latch up? How will TAP cells solve the latch -up problem? How do you create power / voltage regions? Are any guidelines to follow to define the Power / Voltage reg...